【 摘 要 】
Cylindrical Surrounding Double-Gate (CSDG) MOSFETs have been designed for a suitable CMOS replacement to diminish the power and area tradeoff. With these MOSFETs below 70 nm node for Semiconductor Industry Association (SIA) roadmap, the CMOS technology has excellent immunity to the Short Channel Effects (SCE) and better scalability. To reduce the SCE, the device was analyzed by improving the gate oxide thickness between the gate terminal and channel material and replacing the conventional Silicon dioxide layer with numerous high- dielectric materials. The gate oxide thickness is scalable so that it should have the same thickness as that of the Equivalent Oxide Thickness (EOT). This kind of novel structure shows improvement in the ON-state current and OFF-state current. The usage of the cylindrical surrounding double-gate and the high- dielectric in the oxide layer makes the MOSFET with improved stability and controllability. In this paper, the high- material is chosen in a way that it has been applied in the CSDG environment and the electrical field, electron densities have been analyzed. The semiconductor can exhibit various energy bands at the Fermi level, commonly referred to as valley. These kinds of valley semiconductors, which have several valleys are called multi-valley semiconductors. The current value in valley-1 is 2.41 mA/ $\mu m$ ; it also drops to 62.14 % than valley-4, which has 6.38 mA/ $\mu m$ . However, valley-2 and valley-3 have intermediate values. The energy in the sub-band for the operating region of the source has been observed to be 19.12 % to the drain side which has the value of 0.041 eV at the terminal end. This shows the modeled CSDG MOSFET works well with the operating electric field created by the cylindrical capacitors constituted by the two different gate materials surrounding the substrate.
【 授权许可】
Unknown
878987797
028-85220240
