IEEE Journal of the Electron Devices Society | |
On the Characterization and Separation of Trapping and Ferroelectric Behavior in HfZrO FET | |
Marc Heyns1  Md. Nur Kutubul Alam1  Jan Van Houdt1  Mihaela Popovici1  Ben Kaczer1  Lars-Ake Ragnarsson1  Naoto Horiguchi1  Gerhard Rzepa2  | |
[1] IMEC, Institute for Microelectronics, Leuven, Belgium;Institute for Microelectronics, TU Vienna, Vienna, Austria; | |
关键词: Steep-slope FET; ferroelectric FET; trap characterization; | |
DOI : 10.1109/JEDS.2019.2902953 | |
来源: DOAJ |
【 摘 要 】
N-channel FETs with ferroelectric (FE) HfZrO gate oxide are fabricated, showing steep subthreshold slope under certain conditions. Possible origins of ID-VG hysteresis, the hysteresis versus subthreshold slope tradeoff, dependence on the bias voltage and temperature and the competition between trapping and FE behavior are reported and discussed. A band of active traps in the FE layer responsible for charge trapping during device operation is characterized. Transient ID-VG measurements are introduced to facilitate differentiating between trapping and FE behavior during subthreshold slope measurements.
【 授权许可】
Unknown