Iterative Pseudo-Soft-Reliability-Based Majority-Logic Decoding for NAND Flash Memory

IEEE Access

Ki-Seok Chung¹  Kyeong Bin Park¹ 

[1] Department of Electronics and Computer Engineering, Hanyang University, Seoul, South Korea;

关键词: Error correction codes;    Hamming distance;    hard decision;    iterative hard-reliability-based majority-logic decoding algorithm;    NAND flash memory;    nonbinary low-density parity-check codes;   

DOI  :  10.1109/ACCESS.2021.3079939

来源: DOAJ

【 摘 要 】

This paper proposes a decoding algorithm for nonbinary low-density parity-check (NB-LDPC) codes, aiming to improve the error rate performance for NAND flash memory. Several NB-LDPC decoding methods for NAND flash memory have been studied. Some approaches rely on hard decisions, and these are relatively simple but do not have a good error rate performance. Others are based on soft decisions that require multiple reads for each flash memory cell, leading to significant memory throughput degradation. To improve the error rate performance without suffering performance degradation owing to multiple reads, an iterative pseudo-soft-reliability-based decoding algorithm is proposed. Using Galois field addition to calculate the Hamming distance at the initialization, the proposed algorithm not only improves the error rate performance but also reduces the average number of iterations compared with those of conventional hard-decision-based decoding algorithms.

【 授权许可】

Unknown