FPGA Based Test Module for Error Bit Evaluation in Serial Links

Radioengineering

关键词: Serial link;    bit error rate;    LFSR counter;    free-space optical link;    FPGA;   

DOI  :  

来源: DOAJ

【 摘 要 】

A test module for serial links is described. In the link transmitter, one module generates pseudorandom pulse signal that is transmitted by the link. Second module located in the link receiver generates the same signal and compares it to the received signal. Errors caused by the signal transmission can be then detected and results sent to a master computer for further processing like statistical evaluation. The module can be used for long-term error monitoring without need for human operator presence.

【 授权许可】

Unknown