A Highly Reliable, 5.8 GHz DSRC Wake-Up Receiver with an Intelligent Digital Controller for an ETC System

Sensors

Kang-Yoon Lee¹  Danial Khan¹  YoungGun Pu¹  Imran Ali¹  Muhammad Asif¹  Huo Yingge¹  Sang-Sun Yoo¹  MuhammadRiaz Ur Rehman¹  SungJin Kim¹ 

[1] College of Information and Communication Engineering, Sungkyunkwan University (SKKU), Suwon 16419, Korea;

关键词: wake-up receiver;    digital controller;    reliability;    electronic toll collection (ETC) system;    dedicated short range communication (DSRC);   

DOI  :  10.3390/s20144012

来源: DOAJ

【 摘 要 】

In this article, a highly reliable radio frequency (RF) wake-up receiver (WuRx) is presented for electronic toll collection (ETC) applications. An intelligent digital controller (IDC) is proposed as the final stage for improving WuRx reliability and replacing complex analog blocks. With IDC, high reliability and accuracy are achieved by sensing and ensuring the successive, configurable number of wake-up signal cycles before enabling power-hungry RF transceiver. The IDC and range communication (RC) oscillator current consumption is reduced by a presented self-hibernation technique during the non-wake-up period. For accommodating wake-up signal frequency variation and enhancing WuRx accuracy, a digital hysteresis is incorporated. To avoid uncertain conditions during poor and false wake-up, a watch-dog timer for IDC self-recovery is integrated. During wake-up, the digital controller consumes 34.62 nW power and draws 38.47 nA current from a 0.9 V supply. In self-hibernation mode, its current reduces to 9.7 nA. It is fully synthesizable and needs 809 gates for its implementation in a 130 nm CMOS process with a 94 × 82 µm² area. The WuRx measured power consumption is 2.48 µW, has −46 dBm sensitivity, and a 0.484 mm² chip area.

【 授权许可】

Unknown