On-Chip Recovery Operation for Self-Aligned Nitride Logic Non-Volatile Memory Cells in High-K Metal Gate CMOS Technology

IEEE Journal of the Electron Devices Society

Po-Yen Lin¹  Ya-Chin King¹  Yu-Lun Chiu¹  Yuh-Te Sung¹  Chrong Jung Lin¹  Jim Chen²  Tzong-Sheng Chang² 

[1] Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan;Process Integration Division Fab12, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan;

关键词: Charge Pumping;    Nonvolatile Memory;    Reliability;    Self -Recovery;   

DOI  :  10.1109/JEDS.2015.2475257

来源: DOAJ

【 摘 要 】

A new on-chip recovery operation is proposed in the self-aligned nitride (SAN) cell. Merged nitride spacer is sandwiched between high-k metal gate stacks in nano-meter CMOS process. The scaled gate length enables the SAN cell be erased by band-to-band hot hole. For multiple-time-programming operation, two effective recovery methods are proposed to recover on/off window after cycling stress. Both ac and dc methods are applied to eliminate deep-trapped charges via electrical self-heating. Experimental data demonstrates dc recovery methods that provide nearly full damage anneal capability and, in turn, effectively extend SAN cell's endurance level.

【 授权许可】

Unknown