| IEEE Access | |
| Efficient Homomorphic Encryption Accelerator With Integrated PRNG Using Low-Cost FPGA | |
| Rahmat Mulyawan1  Infall Syafalni1  Trio Adiono1  Nana Sutisna1  Gilbert Jonatan2  | |
| [1] Electrical Engineering Department, School of Electrical Engineering and Informatics, Bandung Institute of Technology, Bandung, Indonesia;University Center of Excellence on Microelectronics, Bandung Institute of Technology, Bandung, Indonesia; | |
| 关键词: BFV scheme; fully homomorphic encryption; Gaussian PRNG; hardware accelerator; systolic array; | |
| DOI : 10.1109/ACCESS.2022.3143804 | |
| 来源: DOAJ | |
【 摘 要 】
With recent development in internet speed and reliability, cloud computing has become a more reliable solution for the user. In many cases where data privacy is critical, fully homomorphic encryption (FHE) can be a security solution for securing cloud computing. FHE enables computation on encrypted data, hence it ensures data privacy in case of cloud computing. One popular scheme of FHE is the BFV homomorphic encryption scheme, which is based on ring learning with error (RLWE) computation. The BFV scheme uses ring polynomials as the main object, hence its encryption, decryption, and evaluation require high-degree polynomial multiplication. In this paper, we present comprehensive design and implementation of a hardware architecture to accelerate encryption and decryption in BFV scheme. Our accelerator uses convolution approach for calculating a polynomial multiplication. To implement the convolution, we use a systolic array to calculate polynomial convolution followed by a simple delayed subtraction to calculate polynomial modulo reduction inside our accelerator’s core. Moreover, we use a built-in Gaussian pseudo-random number generator (PRNG) to generate Gaussian noise in the encryption operations. Finally, we implement the 1024 degrees BFV accelerator on the Xilinx PYNQ Z1 board and compare the encryption and decryption performances to other methods as well as a software implementation on Intel Core i7 with 8GB memory. Experimental results show that our accelerator outperforms the clock cycles of other methods with the same polynomial degrees 1024 up to
【 授权许可】
Unknown