Toward Fast and Scalable Firmware Fuzzing With Dual-Level Peripheral Modeling

IEEE Access

Hyunseok Lee¹  Mingi Cho¹  Eunbi Hwang¹  Taekyoung Kwon¹  Seyeon Jeong¹ 

[1] Graduate School of Information, Yonsei University, Seoul, South Korea;

关键词: Firmware;    fuzzing;    peripheral modeling;    security;    vulnerability;   

DOI  :  10.1109/ACCESS.2021.3118854

来源: DOAJ

【 摘 要 】

Firmware vulnerabilities raise serious security concerns with the rapid growth in connected embedded devices. Fuzzing is an effective dynamic testing technique to find those vulnerabilities; however, firmware fuzzing is very limited by hardware dependence, such as on-chip and off-chip peripherals. The latest elegant approaches are making substantial progress in hardware-independent firmware fuzzing, but there is room for further improvement. We observe that hardware-independent peripheral modeling is scalable but slow at the register level; in contrast, at the abstract function level, it is fast but has limited scalability. Firmware fuzzing is still challenging in terms of achieving both scalability and efficiency. To address this problem, we present a dual-level approach that leverages register level modeling and selective function level modeling in a hybrid manner. Our method starts firmware fuzzing at the register level and connects peripheral handlers while executing hardware abstraction layer functions. We evaluate our method in terms of efficiency, scalability, and effectiveness with four real-world firmware and demonstrate the possibility of relatively fast and scalable firmware fuzzing that combines the benefits of the two levels.

【 授权许可】

Unknown