| IEICE Electronics Express | |
| A 1.8-nW sub-1-V self-biased sub-bandgap reference for low-power systems | |
| article | |
| Jinlong Hu1  Ke Liang2  Jin Wang2  Guofeng Li1  | |
| [1] Tianjini Key Laboratory of Optoelectronic Sensor and Sensing Network Technology, College of Electronic Information and Optical Engineering, Nankai University;Engineering Research Center of Thin Film Optoelectronics Technology, Ministry of Education, Nankai University | |
| 关键词: ultra-low power ,sub-bandgap voltage reference ,CMOS ,temperature coefficient ,chip area; | |
| DOI : 10.1587/elex.18.20210204 | |
| 学科分类:电子、光学、磁材料 | |
| 来源: Denshi Jouhou Tsuushin Gakkai | |
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【 摘 要 】
An ultra-low power sub-bandgap voltage reference circuit fabricated in a standard 0.18-µm CMOS technology is proposed. Exploiting the negative temperature characteristics of V BE and V TH , a novel self-biased circuit configuration with a combination of a parasitic BJT and MOSFETs is employed to achieve a temperature-compensated sub-bandgap voltage reference with nanowatt power dispassion. The measurement results show that, the proposed circuit provides an average reference voltage of 261.6 mV with a variation coefficient of 0.86%. The line regulation (LR) is 0.26%/V in a supply voltage range of 0.9 V to 1.8 V at 27°C, and the power supply rejection ratio (PSRR) is -49 dB at 100 Hz. With one-time trimming, measurements performed over a set of 18 samples shows an average temperature coefficient of 25.9 ppm/°C in a temperature range from -20 to 100°C. The power dissipation is 1.8 nW with a supply voltage of 0.9 V at 27°C. The chip area is 0.0038 mm 2 .
【 授权许可】
CC BY
【 预 览 】
| Files | Size | Format | View |
|---|---|---|---|
| RO202108210002262ZK.pdf | 610KB |
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