Sensors | |
Parametric Dense Stereovision Implementation on a System-on Chip (SoC) | |
Alfredo Gardel1  Pablo Montejo2  Jorge Garc1  Ignacio Bravo1  | |
[1] Electronics Department, University of Alcala, Alcalá de Henares, Madrid 28871, Spain; E-Mails:;Higher Polytechnic Institute José Antonio Echeverría (CUJAE), La Habana, 19390, Cuba; E-Mail: | |
关键词: stereovision; reconfigurable hardware; correspondence; entropy; correlation; real-time processing; | |
DOI : 10.3390/s120201863 | |
来源: mdpi | |
【 摘 要 】
This paper proposes a novel hardware implementation of a dense recovery of stereovision 3D measurements. Traditionally 3D stereo systems have imposed the maximum number of stereo correspondences, introducing a large restriction on artificial vision algorithms. The proposed system-on-chip (SoC) provides great performance and efficiency, with a scalable architecture available for many different situations, addressing real time processing of stereo image flow. Using double buffering techniques properly combined with pipelined processing, the use of reconfigurable hardware achieves a parametrisable SoC which gives the designer the opportunity to decide its right dimension and features. The proposed architecture does not need any external memory because the processing is done as image flow arrives. Our SoC provides 3D data directly without the storage of whole stereo images. Our goal is to obtain high processing speed while maintaining the accuracy of 3D data using minimum resources. Configurable parameters may be controlled by later/parallel stages of the vision algorithm executed on an embedded processor. Considering hardware FPGA clock of 100 MHz, image flows up to 50 frames per second (
【 授权许可】
CC BY
© 2012 by the authors; licensee MDPI, Basel, Switzerland
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