Digital Pixel Sensor Array with Logarithmic Delta-Sigma Architecture

Sensors

Alireza Mahmoodi¹  Jing Li¹ 

[1] Department of Electrical and Computer Engineering, University of Alberta, 9107 116 Street NW, Edmonton, AB T6G 2V4, Canada;

关键词: CMOS image sensors;    dynamic range;    digital pixel sensors;    nonlinear response;    signal-to-noise ratio;    analog-to-digital conversion;    delta-sigma modulation;    decimation;   

DOI  :  10.3390/s130810765

来源: mdpi

【 摘 要 】

Like the human eye, logarithmic image sensors achieve wide dynamic range easily at video rates, but, unlike the human eye, they suffer from low peak signal-to-noise-and-distortion ratios (PSNDRs). To improve the PSNDR, we propose integrating a delta-sigma analog-to-digital converter (ADC) in each pixel. An image sensor employing this architecture is designed, built and tested in 0.18 micron complementary metal-oxide-semiconductor (CMOS) technology. It achieves a PSNDR better than state-of-the-art logarithmic sensors and comparable to the human eye. As the approach concerns an array of many ADCs, we use a small-area low-power delta-sigma design. For scalability, each pixel has its own decimator. The prototype is compared to a variety of other image sensors, linear and nonlinear, from industry and academia.

【 授权许可】

CC BY   
© 2013 by the authors; licensee MDPI, Basel, Switzerland.