Composite Field Multiplier based on Look-Up Table for Elliptic Curve Cryptography Implementation

Journal of ICT Research and Applications

Intan Muchtadi-Alamsyah²  Marisa W. Paryasto¹  Fajar Yuliawan²  Budi Rahardjo¹  Kuspriyanto¹ 

[1]School of Electrical Engineering and Informatics, Institut Teknologi BandungJl. Ganesha No. 10 Bandung 40132 �? Indonesia $$School of Electrical Engineering and Informatics, Institut Teknologi BandungJl. Ganesha No. 10 Bandung 40132 �? Indonesia School of Electrical Engineering and Informatics, Institut Teknologi BandungJl. Ganesha No. 10 Bandung 40132 �? Indonesia $$

[2]Algebra Research Group, Faculty of Mathematics and Natural Sciences,Institut Teknologi Bandung, Jl. Ganesha No. 10 Bandung 40132 �? Indonesia $$Algebra Research Group, Faculty of Mathematics and Natural Sciences,Institut Teknologi Bandung, Jl. Ganesha No. 10 Bandung 40132 �? Indonesia Algebra Research Group, Faculty of Mathematics and Natural Sciences,Institut Teknologi Bandung, Jl. Ganesha No. 10 Bandung 40132 �? Indonesia $$

关键词: composite field;    cryptography;    elliptic curve;    finite field;    multiplier;    security.;   

DOI  :  10.5614/itbj.ict.2012.6.1.4

学科分类：电子、光学、磁材料

来源: Institute for Research and Community Services ITB

【 摘 要 】

Implementing a secure cryptosystem requires operations involving hundreds of bits. One of the most recommended algorithm is Elliptic Curve Cryptography (ECC). The complexity of elliptic curve algorithms and parameters with hundreds of bits requires specific design and implementation strategy. The design architecture must be customized according to security requirement, available resources and parameter choices. In this work we propose the use of composite field to implement finite field multiplication for ECC implementation. We use 299-bit keylength represented in GF((213)23) instead of in GF(2299). Composite field multiplier can be implemented using different multiplier for ground-field and for extension field. In this paper, LUT is used for multiplication in the ground-field and classic multiplieris used for the extension field multiplication. A generic architecture for the multiplier is presented. Implementation is done with VHDL with the target device Altera DE2. The work in this paper uses the simplest algorithm to confirm the idea that by dividing field into composite, use different multiplier for base and extension field would give better trade-off for time and area. This work will be the beginning of our more advanced further research that implements composite-field using Mastrovito Hybrid, KOA and LUT.

【 授权许可】

Unknown