IEICE Electronics Express | |
Chain-Mapping for mesh based Network-on-Chip architecture | |
Ahmad Khademzadeh1  Misagh Tavanpour2  Majid Janidarmian2  | |
[1] Iran Telecom Research Center;CE Department, Science and Research Branch, Islamic Azad University | |
关键词: Chain-Mapping; Network-on-Chip; mapping algorithm; bandwidth; mesh; | |
DOI : 10.1587/elex.6.1535 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(10)Cited-By(7)Mapping of IP cores on a given platform is one of the three aspects of Network-on-Chip design. Mapping priority of IP cores is mostly based on a single communication in previously proposed algorithms. In this paper we present Chain-Mapping (CHMAP), as an algorithm for mapping cores onto a mesh-based Network-on-Chip architecture. The main aim of the algorithm is to produce chains of connected cores in order to introduce a new method to prioritize IP core which helps us to have more efficient mapping. Proposed algorithm and previous researches were compared on two real applications, i.e. Video object plan decoder (VOPD) and MPEG-4 and results were reported.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300901505ZK.pdf | 574KB | download |