A parasitic insensitive C-DAC with time-mode reference voltage generator

IEICE Electronics Express

Yong-Min Lee²  Ho-Young Park³  Sang-Hyeok Yang³  Kye-Shin Lee¹  Suki Kim³ 

[1] Department of Electrical and Computer Engineering, The University of Akron;Department of Information Display, Sun Moon University;Department of Electrical Engineering, Korea University

关键词: C-DAC;    parasitic insensitivity;    time mode reference generator;   

DOI  :  10.1587/elex.9.745

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(5)This paper proposes a 10-bit parasitic insensitive capacitive DAC with time-mode reference voltage generator for high resolution LCD drivers. In this architecture, the parasitic insensitive operation is achieved by modifying the switch control scheme of the DAC. Furthermore, the time-mode reference voltage generator replaces the conventional resistor divider scheme, which reduces the size of the reference generation circuitry and enables programmable DAC reference voltage. The proposed DAC was designed with CMOS 0.35µm technology. The maximum INL and DNL showed -0.049LSB and -0.026LSB even with 10% parasitic capacitance.

【 授权许可】

Unknown