A high-throughput fixed-point complex divider for FPGAs

IEICE Electronics Express

Dong Wang¹  Leibo Liu²  Pengju Ren³ 

[1] Institute of Microelectronics, Tsinghua University;Research Center for Mobile Computing, Tsinghua University;Institute of Artificial Intelligence and Robotics, Xi’an Jiaotong University

关键词: complex divider;    FPGA;    CORDIC;   

DOI  :  10.1587/elex.10.20120879

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(10)Cited-By(1)This paper presents a high-throughput fixed-point complex divider which uses four pipelined CORDIC units to transform and divide complex numbers in Polar coordinates. By persevering the macro-angle for CORDIC rotations in redundant form and developing an optimized pipelining structure, the FPGA based implementation achieves a 9× advantage on throughput over the best design reported. In addition, the final error is guaranteed within 1ulp (unit in last position). Thus the proposed complex divider is highly suitable for accelerating DSP applications with high precision numerical accuracy requirements.

【 授权许可】

Unknown