An offset distribution modification technique of stochastic flash ADC

IEICE Electronics Express

Tomohiro Asano¹  Yusaku Hirai¹  Shinya Yano¹  Ikkyun Jo¹  Sadahiro Tani¹  Toshimasa Matsuoka¹ 

[1] Graduate School of Engineering, Osaka University

关键词: stochastic flash ADC;    comparator;    mismatch;    CMOS;    genetic algorithm;   

DOI  :  10.1587/elex.13.20160115

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(16)A new non-linearity reduction technique for stochastic flash ADC (SF-ADC) is proposed, focusing on distribution of comparator input-referred offsets. The SF-ADC test chip fabricated in a 130-nm CMOS process demonstrated the proposed technique can improve SNDR. In addition, the digital re-quantization also can improve the linearity more, where quantization level and fractional correction can be optimized using genetic algorithm.

【 授权许可】

Unknown