IEICE Electronics Express | |
High performance voltage follower with very low output resistance for WTA applications | |
Ivan Padilla-Cantoya1  Paul M. Furth2  | |
[1] Departamento de Electronica, Sistemas e Informatica DESI, Instituto Tecnologico y de Estudios Superiores de Occidente ITESO;Klipsch School of Electrical and Computer Engineering, New Mexico State University | |
关键词: analog CMOS integrated circuits; voltage follower; winner-take-all (WTA) analog circuits; | |
DOI : 10.1587/elex.11.20140629 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(7)A modification of the conventional Flipped Voltage Follower (FVF) to enhance its output resistance is presented. It consists of replacing the conventional cascoding transistor of the basic cell by a regulated cascode scheme. This decreases the output resistance by a factor gmro approximately, the gain of a transistor as an amplifying stage. This is achieved with only two additional transistors and a biasing current IB, offering a significant advantage with respect to other previously reported architectures that require considerably increased power consumption and number of devices. Simulation results in 0.5 µm technology show an enhancement factor of 16, approximately, with respect to the conventional FVF, resulting in an output resistance of 3.1 Ω. Additionally, the proposed follower was implemented in a winner-take-all circuit to prove its functionality; simulation and experimental results confirm the proposed operation.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300655007ZK.pdf | 1782KB | download |