IEICE Electronics Express | |
Design and implementation of high performance matrix inversion based on reconfigurable processor | |
Jun Lin1  Feng Han1  Fan Feng1  Kun Wang1  Li Li1  | |
[1] School of Electronic Science and Engineering, Nanjing University | |
关键词: reconfigurable processor; matrix inversion; LU decomposition; parallel computing; time-sharing multiplexing; | |
DOI : 10.1587/elex.13.20160579 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(17)Cited-By(1)In this paper, we propose a high performance matrix inversion implementation on a reconfigurable application specific processor. Our implementation can accelerate variable order matrix inversion ranging from 4 to 144. We adopt LU decomposition to reduce the computation complexity and a pivoting operation to ensure the stability. In order to get higher performance within the limited resources, parallel computing and time-sharing multiplexing are employed. The chip testing results show that our implementation improve the performance of inversion efficiently. The highest parallel speed-up ratio can achieve 3 times, and the execution time of a 144 × 144 matrix inversion is 4.07 ms.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300602489ZK.pdf | 1700KB | download |