American Journal of Applied Sciences | |
Spartan-3AN Field Programmable Gate Arrays Truncated Multipliers Delay Study | Science Publications | |
Mohammed H. Al-Mijalli1  | |
关键词: Field Programmable Gate Array (FPGA); spartan-3AN; Digital Signal Processing (DSP); Application Specific Integrated Circuits (ASICs); xilinx family; | |
DOI : 10.3844/ajassp.2011.554.557 | |
学科分类:自然科学(综合) | |
来源: Science Publications | |
【 摘 要 】
Problem statement: The image processing applications, such as MPEG video compression used in CT scan frames requires real time conditions and the algorithms should be verified and optimized before implementation which cannot be done with Application Specific Integrated Circuits (ASICs) because they are not reconfigurable and cost is very high. Approach: The FPGA is a viable technology that could be implemented and reconfigured at the same time, since FPGA have the benefit of hardware speed and the flexibility of software. Results: The results obtained from Sparatn-3An FPGA showed the mean delay time for four multipliers, clearly indicates as the size of multiplier increases the mean delay time also increases. Conclusion: The FPGA based truncated multipliers could also be used in medical imaging technology.
【 授权许可】
Unknown
【 预 览 】
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RO201911300542506ZK.pdf | 199KB | download |