期刊论文详细信息
IEICE Electronics Express | |
Energy and area-efficient tri-level switching procedure based on half of the reference voltage for SAR ADC | |
Mahmoud Kamarei1  Mohsen Shahmohammadi1  Shahin J. Ashtiani1  | |
[1] The School of Electrical and Computer Engineering, College of Engineering, University of Tehran | |
关键词: SAR ADC; Reference voltage; DAC; capacitor array; energy; common-mode voltage; | |
DOI : 10.1587/elex.9.1397 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(4)Cited-By(2)An energy-efficient tri-level switching scheme based on half of the reference voltage (Vref) is proposed for the successive approximation register (SAR) analogue-to-digital converter (ADC). With respect to the set-and-down switching scheme, the common-mode voltage variation at the input of the comparator reduces. By using Vref/2, the switching energy and the capacitor area are reduced. The proposed scheme achieves 97.26% less switching energy with one forth of the capacitor area as compared to the conventional architecture.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
---|---|---|---|
RO201911300540584ZK.pdf | 135KB | download |