IEICE Electronics Express | |
Workload-driven adaptive log buffer-based FTL | |
Dongkun Shin1  | |
[1] School of Information and Communication Engineering Sungkyunkwan University | |
关键词: flash memory; flash translation layer; log buffer; hybrid mapping; embedded storage; | |
DOI : 10.1587/elex.7.804 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(5)Cited-By(1)Flash translation layer (FTL) is generally used for NAND flash memory in order to handle the mapping between logical page address and physical page address. Log buffer-based FTLs provide good performances with small-sized mapping information. In designing the log buffer-based FTL, one important factor is to determine the mapping architecture between data block and log block, called associativity. While previous static schemes use fixed associativities, our scheme adjusts the associativity dynamically based on the run-time workload variation improving the performance by 5∼16% compared to the static scheme.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300532529ZK.pdf | 199KB | download |