| IEICE Electronics Express | |
| Development and evaluation of a microstep DFA vulnerability estimation method | |
| Masahiro Kaminaga1  Arimitsu Shikoda1  Hideki Yoshikawa1  | |
| [1] Faculty of Engineering, Tohoku-Gakuin University | |
| 关键词: DFA; fault analysis; round reduction; | |
| DOI : 10.1587/elex.8.1899 | |
| 学科分类:电子、光学、磁材料 | |
| 来源: Denshi Jouhou Tsuushin Gakkai | |
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【 摘 要 】
References(5)Cited-By(2)Recently, various studies of attack methods of round reduction differential fault analysis (DFA) using fault injection in block cipher-implemented microcontrollers have been reported. However, few studies have focused on the quantitative evaluation method of round reduction DFA vulnerability using detailed fault injection timing dependency of attack success rate. This is required to improve microcontroller security. Hence, we propose a quantitative evaluation method against round reduction DFA using a micro step DFA vulnerability chart and a vulnerability estimator (VE) that consists of pairs of fault injection timing and attack success rate.
【 授权许可】
Unknown
【 预 览 】
| Files | Size | Format | View |
|---|---|---|---|
| RO201911300527150ZK.pdf | 12949KB |
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