| American Journal of Applied Sciences | |
| A RECONFIGURABLE ARCHITECTURE OF TURBO DECODER FOR MIMO-HIGH SPEED DOWNLINK PACKET ACCESS | Science Publications | |
| T. Yasodha1  I. Jacob Raglend1  K. Meena Alias Jeyanthi1  | |
| 关键词: Reconfigurable; MIMO- HSDPA; Turbo Codes; Max-Log-MAP; | |
| DOI : 10.3844/ajassp.2014.883.887 | |
| 学科分类:自然科学(综合) | |
| 来源: Science Publications | |
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【 摘 要 】
A novel channel based rescheduling scheme for modern turbo convolution code is proposed by the inclusion of suboptimal and low-complex max-log-MAP algorithm. Demands for dedicated custom solutions in mobile communications and its related applications leads to a reconfigurable architecture for Turbo convolution code. This study comprises the design and performance evolution of the proposed reconfigurable architecture for channel coding scheme in MIMO-High Speed Downlink Packet Access (MIMO-HSDPA). To attain effective performance close to shannon limit in a multi channel system, flexible reconfigurable architecture is realized with 28 nm cyclone V GX 5CGXFC5C6 FPGA. We achieved throughput of 13.5 Mbps compared with the conventional HSDPA standards while consuming 53 mW.
【 授权许可】
Unknown
【 预 览 】
| Files | Size | Format | View |
|---|---|---|---|
| RO201911300458576ZK.pdf | 108KB |
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