A high performance fully pipeline JPEG-LS encoder for lossless compression

IEICE Electronics Express

Byung-Soo Kim¹  Dong-Sun Kim²  Seungkyu Baek¹  Duck-Jin Chung¹ 

[1] School of Information and Communication Engineering, INHA University;Department of the Multimedia IP Research Center, Korea Electronics Technology Institute

关键词: lossless image compression;    FPGA implementation;    JPEG-LS;    pipeline architecture;   

DOI  :  10.1587/elex.10.20130348

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(7)This paper presents the design of a JPEG-LS encoder for lossless image compression. The proposed encoder is mainly composed of a context determination block, a pixel prediction block, a prediction error encoding block, a context update block, a code appending block. All operations are fully implemented using efficient pipeline method to increase a JPEG-LS encoder’s throughput for real time applications and the original LOCO-I compression algorithm is not modified to compliant with the standard. The proposed encoder uses forwarding technique and pipeline method to avoid hazards, processing speed of the encoder has increased to 120Mpixels per second. The proposed encoder has been verified by using FPGA implementation. Experimental results show that proposed JPEG-LS encoder is suitable for real time and mobile devices that high speed and low computational cost are a priority.

【 授权许可】

Unknown