A digital background calibration technique for SAR ADC based on capacitor swapping

IEICE Electronics Express

Qi Yu¹  Ling Du¹  Shuangyi Wu¹  Yang Liu¹  Ning Ning¹ 

[1] State Key Lab of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

关键词: analog-to-digital conversion;    capacitor mismatch;    digital background calibration;    SAR ADC;   

DOI  :  10.1587/elex.11.20140325

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(7)A digital background calibration technique that compensates for capacitor mismatches is proposed for successive approximation register analog-to-digital converter (SAR ADC). The technique is implemented in the SAR ADC based on tri-level switching. The termination capacitor in the digital-to-analog converter is considered as a reference capacitor and the digital weights of all other unit capacitors are corrected with respect to the reference capacitor. Behavior simulation is performed to verify the proposed calibration technique by using a 12-bit SAR ADC with 3% random capacitor mismatch. The simulation result shows that the signal-to-noise and distortion ratio is improved from 57.1 dB to 72.0 dB and the spurious free dynamic range is improved from 62.0 dB to 82.6 dB.

【 授权许可】

Unknown