A high performance network-on-chip scheme using lossless data compression

IEICE Electronics Express

Jin-Ho Ahn⁴  Sungho Kang¹  Youngha Jung³  Hong-Sik Kim¹  Hyunjin Kim¹  Woo-Chan Park² 

[1] Department of Electrical & Electronic Engineering, Yonsei University;Department of Computer Science, Sejong University;Samgsung Electronics Co. Ltd.;Department of Electronic Engineering, Hoseo University

关键词: NoC;    lossless data compression;    Golomb-Rice algorithm;   

DOI  :  10.1587/elex.7.791

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(6)A new NoC (network on chip) architecture using lossless data compression and decompression to improve the performance and power efficiency of the on-chip interconnect is proposed. In the proposed NoC scheme, the sender compresses the data to be transferred in order to reduce the number of data packets and the receiver decompresses the encoded data to restore the original data. For the lossless compression and decompression, we have implemented a hardware CODEC based on a Golomb-Rice algorithm. According to the experimental results using a cycle-accurate NoC simulator, the proposed scheme could significantly improve the performance and power efficiency of the conventional NoC architecture.

【 授权许可】

Unknown