IEICE Electronics Express | |
A common-mode BIST technique for fully-differential sample-and-hold circuits | |
Jun Yuan1  Masayoshi Tachibana1  | |
[1] Electronic and Photonic System Engineering, Kochi University of Technology | |
关键词: common-mode; fully-differential operational amplifier; sample-and-hold circuit; built-in self-test; analog mixed-signal; | |
DOI : 10.1587/elex.9.1128 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(9)This paper presents a Common-Mode (CM) Built-In Self-Test (BIST) technique for Fully-Differential (FD) Sample-and-Hold (S/H) circuits. Based on the CM test setup, the catastrophic and parametric faults in the MOS switches and hold capacitors can be detected by checking the differential outputs, which should vary around the desired CM output of the FD Operational Amplifier (OpAmp) used in the FD S/H circuits under test. The fault simulation results in circuit-level and the layout design using Rohm 0.18-µm CMOS technology are presented to demonstrate the feasibility of the proposed CM BIST technique for FD S/H circuits.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300330310ZK.pdf | 680KB | download |