IEICE Electronics Express | |
Sense amplifier driving scheme with adaptive delay line for reducing peak current and driving time variations in deep-sub-micron DRAMs | |
Kyeong-Sik Min1  Yong-Jin Kwon1  Ho-Jun Song1  O-Sam Kwon1  | |
[1] School of Electrical Engineering, Kookmin University | |
关键词: DRAM; PVT variations; sense amplifier; sequential driving; | |
DOI : 10.1587/elex.5.472 | |
学科分类:电子、光学、磁材料 | |
来源: Denshi Jouhou Tsuushin Gakkai | |
【 摘 要 】
References(4)In this letter, a simple but effective sense-amplifier driving circuit using adaptive delay line is proposed to suppress a high current peak occurring in enabling sense amplifiers at a fast Process-VDD-Temperature (PVT) condition. And, this circuit also can improve a slow enabling time of sense amplifiers at a slow PVT corner. This new circuit is verified in recent 0.18-µm DRAM technology, where the variations in the sense-amplifier enabling time and peak current are suppressed from 72% to 1% and 240% to 28%, respectively, compared with the previous sequential sense-amplifier driving circuit.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201911300184057ZK.pdf | 188KB | download |