American Journal of Applied Sciences | |
Architecture of Ultra Low Power Micro Energy Harvester Using RF Signal for Health Care Monitoring System: A Review | Science Publications | |
Farah Fatin Zulkifli1  Mohd Ambri Mohamed1  Jahariah Sampe1  Muhammad Shabiul Islam1  | |
关键词: Radio Frequency Micro Energy Harvester (RFMEH); Ultra Low Power (ULP); Impedance Matching; Health Care Monitoring System; | |
DOI : 10.3844/ajassp.2015.335.344 | |
学科分类:自然科学(综合) | |
来源: Science Publications | |
【 摘 要 】
This research presents architecture of Ultra Low Power (ULP)Micro Energy Harvester (MEH) using Radio Frequency (RF) signal as an input. RFhas many advantages compared to other ambient sources because it is notaffected by changes of weather or time, does not require heat or wind exposureand it can be moved randomly within the bound of the transmission source. WhenRF is used as the sole input, the designer needs to consider impedance matchingas the most important element so that the antenna can transfer maximum power.The existing energy harvesters apply conjugate matching network as the currentsolution. However, this method causes some difficulties since the solutionrequires consideration of both voltage boosting and conjugate matching networksimultaneously. To solve this problem, we propose ULP Radio Frequency MicroEnergy Harvester (RFMEH) that will utilize a control loop as voltage boostingadjuster and network tuner to achieve maximum power transfer and minimum powerreflection. The proposed architecture will also improve the RF-DC conversionefficiency and the sensitivity of the system. This is achieved using anefficient rectification scheme to convert RF to DC, DC-DC boost converter toincrease the dc output voltage, adaptive control circuit to adjust theswitching timing of boost converter, voltage limiter and regulator to producethe best output voltage. The proposed ULP RFMEH architecture will be designedand simulated using PSPICE software, Verilog coding using Mentor Graphics andfunctional verification using FPGA board (FPGA) before being implemented inCMOS 0.13 µm process technology. The proposed architecture will deliverapproximately 2.45 V of output voltage from low input power level (-20 dBm)with an efficiency of more than 60%. This design will minimize the powerconsumption as compared to previous achievements and it can be applied insupplying power for health care monitoring systems or micro biomedicalapplications.
【 授权许可】
Unknown
【 预 览 】
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RO201911300164202ZK.pdf | 302KB | download |