Ultralow power processor employing block instruction for ECG applications

IEICE Electronics Express

Jing Qiu¹  Xiaoyan Xiang²  Jianyi Meng²  Zhijian Chen¹  Yong Ding¹ 

[1] Institute of VLSI Design, Zhejiang University;State Key Laboratory of ASIC & System, Fudan University

关键词: ECG;    ultralow power processor;    block instruction;    hardware-software co-design;   

DOI  :  10.1587/elex.13.20150493

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(8)Conventional processors that execute a single instruction at a time are easy to implement but lack the power efficiency. This paper presents a novel hardware-software co-designed method to save power consumption for ECG applications. The software generates block instruction which is comprised of several atomic operations, reduces the instruction memory space, and merges memory operations within a block. The hardware executes instructions block by block, eliminates redundant fetching and decoding operations. The experiments indicate that the proposed design methodology can reduce the active power consumption and code size by 40% and 55% relative to CK802 (a conventional processor).

【 授权许可】

Unknown