Settling time optimization technique for binary-weighted digital-to-analog converter

IEICE Electronics Express

Byung-geun Lee¹  Hyo-jong Kim¹  Donghwan Seo¹ 

[1] School of Mechatronics, Gwangju Institute of Science and Technology (GIST)

关键词: digital to analog converter;    analog to digital converter;    switched-capacitor circuit;    settling time;    successive approximation;   

DOI  :  10.1587/elex.11.20140132

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

References(4)Settling behavior of the binary-weighted switched-capacitor digital-to-analog converter output is analyzed and a design method for fast settling is presented. A calibration circuit that effectively reduces settling time beyond the process limit is also proposed and verified with various simulations.

【 授权许可】

Unknown