A low-overhead RO PUF design for Xilinx FPGAs

IEICE Electronics Express

Ruonan Wang¹  Jingdong Zhang¹  Songwei Pei² 

[1] College of Information and Technology, Beijing University of Chemical Technology;School of Computer Science, Beijing University of Posts and Telecommunications

关键词: physical unclonable function (PUF);    ring oscillator (RO);    field-programmable gate array (FPGA);   

DOI  :  10.1587/elex.15.20180093

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

Ring Oscillator (RO) Physical Unclonable Function (PUF) can effectively generate unique chip responses to support a variety of security-related applications. However, RO PUF typically incurs high hardware overhead when implemented in FPGA. In this paper, we designed a low-overhead RO PUF for Xilinx FPGAs, by which, on average, one-bit reliable PUF response can be generated by using only a single CLB (Configurable Logic Block). In the designed RO PUF, two different ROs can be configured in a single CLB at the same time based on the RO construction unit designed in the LUT (Look-Up Table). The designed RO PUF is implemented and verified by Xilinx Spartan 6 FPGA. Experimental results show that the implemented RO PUF has low hardware overhead and satisfactory quality.

【 授权许可】

CC BY