A multi-core-based heterogeneous parallel turbo decoder

IEICE Electronics Express

Chubin Wu¹  Jun Han¹  Zhiyi Yu¹  Xin Cheng¹  Guangjun Xie³  Zhang Zhang³  Xiaoyang Zeng³  Jianmin Zeng³ 

[1] Applied Physics, Hefei University of Technology;System, Fudan University;School of Electronic Science &School of Electronics and Information Technology, Sun Yat-sen University;State Key Laboratory of ASIC &

关键词: heterogeneous;    parallel turbo decoder;    multi-core;    SDR;   

DOI  :  10.1587/elex.14.20170768

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

It has always been a challenging task to implement a turbo decoder because it’s typically the most compute-intensive and time-consuming part in a wireless communication system. This becomes especially obvious when realizing a turbo decoder through CPUs or GPUs. In this paper, we present a heterogeneous and highly reconfigurable parallel turbo decoder for LTE by employing a multi-core processor platform. A modified sliding-window algorithm is proposed to fully exploit the parallelism of turbo decoder, and a SIMD hardware module is designed for the multi-core processor to accelerate the decoding process. Synthesized result in a 65-nm CMOS process shows that the whole system can run at a maximum clock frequency of 830 MHz, and a decoding throughput of 135 Mbps is achieved for a codeword block length of 6144 at 6 iterations. In addition, the speed-up rate compared to an unaccelerated implementation through the same multi-core platform is in the order of 800%.

【 授权许可】

CC BY