A new compact hardware architecture of S-Box for block ciphers AES and SM4

IEICE Electronics Express

Xiaoqiang Zhang¹  Yaoping Liu²  Fang Zhou²  Ning Wu² 

[1] College of Electrical Engineering, Anhui Polytechnic University;College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics

关键词: advanced encryption standard (AES);    SM4;    S-Box;    composite field arithmetic (CFA);   

DOI  :  10.1587/elex.14.20170358

学科分类：电子、光学、磁材料

来源: Denshi Jouhou Tsuushin Gakkai

【 摘 要 】

In this paper, a new compact implementation of S-Box based on composite field arithmetic (CFA) is proposed for block ciphers AES and SM4. Firstly, using CFA technology, the multiplicative inverse (MI) over GF(28) is mapped into GF((24)2) and the new architecture of S-Box is designed. Secondly, the MI over GF(24) is optimized by Genetic algorithm (GA), and the multiplication over GF(24) and the constant matrix multiplications are optimized by delay-aware common sub-expression elimination (DACSE) algorithm. Finally, compared with the direct implementation, the area reduction of MI over GF((24)2) and the new S-Box are up to 49.29% and 43.80%, severally. In 180 nm 1.8 V COMS technology, compared to the synthesized results of AES S-Box and SM4 S-Box, the area and power consumption of the new S-Box are reduced by 24.76% and 38.54%, respectively.

【 授权许可】

CC BY