Bulletin of the Polish Academy of Sciences. Technical Sciences | |
Grid synchronization and symmetrical components extraction with PLL algorithm for grid connected power electronic converters - a review | |
M. Bobrowska-RafalInstitute of Control and Industrial Electronics, Warsaw University of Technology, 75 Koszykowa St., 00-662 Warsaw, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar1  K. RafalInstitute of Control and Industrial Electronics, Warsaw University of Technology, 75 Koszykowa St., 00-662 Warsaw, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar1  M. KazmierkowskiInstitute of Control and Industrial Electronics, Warsaw University of Technology, 75 Koszykowa St., 00-662 Warsaw, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar1  M. JasinskiInstitute of Control and Industrial Electronics, Warsaw University of Technology, 75 Koszykowa St., 00-662 Warsaw, PolandOther articles by this author:De Gruyter OnlineGoogle Scholar1  | |
[1] Institute of Control and Industrial Electronics, Warsaw University of Technology, 75 Koszykowa St., 00-662 Warsaw, Poland | |
关键词: Keywords: Phase Locked Loop (PLL); symmetrical component extraction; grid synchronization; grid-connected converter; smart grid; Renewable Energy Sources (RES); voltage dip; higher harmonics; power quality; | |
DOI : 10.2478/v10175-011-0060-8 | |
学科分类:工程和技术(综合) | |
来源: Polska Akademia Nauk * Centrum Upowszechniania Nauki / Polish Academy of Sciences, Center for the Advancement of Science | |
【 摘 要 】
In this paper, a review of Phase Locked Loop (PLL) algorithms and symmetrical component extraction methods intended for grid-connected power electronic converters are presented. Proposed classification is based on voltage representation in three coordinates: natural (abc), stationary (αβ) and rotating coordinates (dq). The three selected algorithms are described in details: Dual Second Order Generalized Integrator (DSOGI-PLL), Dual Virtual Flux - both in stationary coordinates. The third one, in rotating dq coordinates, is Dual Synchronous Reference Frame PLL (DSRF-PLL). A comparison of PLL algorithms is presented. Also, selected experimental results are given to verify practical application of discussed algorithms.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201902182044664ZK.pdf | 511KB | download |