期刊论文详细信息
Advances in Electrical and Computer Engineering | |
Threads Pipelining on the CellBE Systems | |
TANASE, C. A. ; GAITAN, V. G.. | |
关键词: Cell B.E.; threads; PPU-SPU pipeline communication; flip-flop buffer; three level pipeline transfer; | |
DOI : 10.4316/AECE.2013.03019 | |
学科分类:计算机科学(综合) | |
来源: Universitatea "Stefan cel Mare" din Suceava | |
【 摘 要 】
This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
【 授权许可】
Unknown
【 预 览 】
Files | Size | Format | View |
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RO201902181633932ZK.pdf | 1037KB | download |