Implementation of high-speed–low-power adaptive finite impulse response filter with novel architecture

The Journal of Engineering

Sandeep Sharma¹  Manish Jaiswal¹  Anuj Sharma¹ 

[1] Department of ECE and AEI, Dehradun Institute of Technology, Dehradun 248001, Uttarakhand, India

关键词: energy efficient high-speed adaptive finite impulse response filter;    adaptive least mean square filter;    high-speed-low-power adaptive finite impulse response filter;    Matlab;    Vertex-4;    size 28 nm;    critical path delay;    Artix-7;    complementary metal-oxide semiconductor;    Xilinx;    CMOS family;    Spartan-6;   

DOI  :  10.1049/joe.2014.0198

学科分类：工程和技术（综合）

来源: IET

【 摘 要 】

An energy efficient high-speed adaptive finite impulse response filter with novel architecture is developed. Synthesis results along with novel architecture on different complementary metal–oxide semiconductor (CMOS) families are presented. Analysis is performed using Artix-7, Spartan-6 and Virtex-4 for most popular adaptive least mean square filter for different orders such as N = 8, 16, 32. The presented work is done using MATLAB (2013b) and Xilinx (14.2). From the synthesis results, it can be found that CMOS (28 nm) achieves the lowest power and critical path delay compared to others, and thus proves its efficiency in terms of energy. Different parameters are considered such as look up tables and input–output blocks, along with their optimised results.

【 授权许可】

CC BY