| The Journal of Engineering | |
| Built-in self-monitor-based finite state machines Trojans detection and self-lock defence | |
| Yongkang Tang1  Jianye Wang2  | |
| [1] Academy of Air-defense and Anti-missile, Air force Engineering University, Xi'an, Shaanxi Province, People's Republic of China | |
| 关键词: circuit synthesis; FSMT detection; self-lock defence; built-in self-monitor-based finite state machine Trojan detection; outsourcing integrated circuit specification; general finite state machine design; security vulnerability; runtime signal; return warning signal; | |
| DOI : 10.1049/joe.2016.0012 | |
| 学科分类:工程和技术(综合) | |
| 来源: IET | |
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【 摘 要 】
Synthesising circuits through general finite state machines design implement transitions from do not-care states to effective ones or themselves. Also, outsourcing integrated circuit specifications to foundries provides adversaries opportunities to build transitions from effective states to do not-care ones. Two security vulnerabilities above can bring finite state machines Trojans (FSMTs) to original circuits. In this Letter, a built-in self-monitor-based approach is proposed to detect FSMTs at runtime and return warning signals, thereby achieving self-lock defence. Finally, the proper solutions are proposed to solve two existing arguments about the authorsâ approach.
【 授权许可】
CC BY
【 预 览 】
| Files | Size | Format | View |
|---|---|---|---|
| RO201902020327498ZK.pdf | 166KB |
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