Design and synthesis of FPGA for speed control of induction motor

International Journal of Physical Sciences

Avnesh Verma¹ 

关键词: Field Programmable Gate Array (FPGA);    look-up-tables (LUTs);    Space Vector Pulse Width Modulation (SVPWM);    Very High Speed Hardware Description Language (VHDL).;   

DOI  :  

学科分类：物理（综合）

来源: Academic Journals

【 摘 要 】

The industrial motor control is quickly changing from micro to nanotechnology design with speed and performance based design implementation. Considering accuracy and synchronism of output response, the attention has been brought to fully digitized design to adopt Space Vector Pulse Width Modulation (SVPWM) as a control technique for three phase Induction Motors due to its resulted advantages in harmonic reduction. Very High Speed Hardware Description Language (VHDL) digitized scheme built on the platform of a Field Programmable Gate Array (FPGA) for direct speed control of Induction Motor has been proposed for industrial applications. This paper proposed hybrid hardware model of analog, digital, power and micro-electronics. The model is focused to industrial application with loss minimization and smooth control of flux. Xilinx 8.1i, Spartan-II FPGA Xc2s50-5pq208, IGBT CT60AM18F, 2HP Induction Motor has been used for design and synthesis of model. The result shows 74% occupied slices and 70% total no of 4 look-up-tables (LUTs) have been utilized. The model response has been observed very smooth.

【 授权许可】

CC BY