Comparative Analysis of Full Adder Circuits

International Conference on Recent Advancements and Effectual Researches in Engineering Science and Technology

Mathew, Aneela Achu^1 ; Sreesh, P.R.^2

Electronics and Communication Engineering, St. Joseph's College of Engineering and Technology, Palai, Kerala, India^1

Dept of Electronics and Communication Engineering, St. Joseph's College of Engineering and Technology, Palai, Kerala, India^2

关键词: Adder circuit;    Comparative analysis;    Digital designs;    Full adders;    Gate diffusion inputs;    Mentor Graphics;    Pass transistor logic (PTL);   

Others  :  https://iopscience.iop.org/article/10.1088/1757-899X/396/1/012041/pdf
DOI  :  10.1088/1757-899X/396/1/012041

来源: IOP

【 摘 要 】

In this paper, comparison of various full adder circuits is analysed. Pull Adder circuits are extensively used in digital design. Here different types of full adder such as Conventional CMOS, based on Ex-OR/Ex-NOR, Pass Transistor Logic(PTL) and Gate Diffusion Input (GDI)technique are done. Prom this, GDI technique takes less number of transistors and therefore consumes less power. In GDI-14T, 12T which is based on MUX and a proposed 10T is implemented. The power consumption is less for 12T whereas better output is obtained for 10T. Simulation results are obtained in 180nm technology using Mentor Graphics Tool.