IIR digital filter design for powerline noise cancellation of ECG signal using arduino platform

International Conference on Physical Instrumentation and Advanced Materials

物理学;材料科学

Rahmatillah, Akif^1 ; Ataulkarim^1

Department of Biomedical Engineering, Universitas Airlangga, Kampus C Mulyorejo, Surabaya

60286, Indonesia^1

关键词: Arduino platforms;    Electrocardiogram signal;    Filter coefficients;    IIR digital filters;    IIR notch filters;    Maximum amplitude;    Pole placement methods;    Sinusoidal signals;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/853/1/012009/pdf
DOI  :  10.1088/1742-6596/853/1/012009

学科分类：材料科学（综合）

来源: IOP

【 摘 要 】

Powerline noise has been one of significant noises of Electrocardiogram (ECG) signal measurement. This noise is characterized by a sinusoidal signal which has 50 Hz of noise and 0.3 mV of maximum amplitude. This paper describes the design of IIR Notch filter design to reject a 50 Hz power line noise. IIR filter coefficients were calculated using pole placement method with three variations of band stop cut off frequencies of (49-51)Hz, (48 - 52)Hz, and (47 - 53)Hz. The algorithm and coefficients of filter were embedded to Arduino DUE (ARM 32 bit microcontroller). IIR notch filter designed has been able to reject power line noise with average square of error value of 0.225 on (49-51) Hz filter design and 0.2831 on (48 - 52)Hz filter design.