Low Temperature Characterization of Hole Mobility in Sub-14nm Gate Length Si0.7Ge0.3 Tri-Gate pMOSFETs

12th International Workshop on Low Temperature Electronics

Laviéville, R.^1 ; Le Royer, C.^2 ; Barraud, S.^2 ; Ghibaudo, G.^1

IMEP-LAHC, Univ. Grenoble Alpes, Minatec Campus, Grenoble

38016, France^1

LETI-CEA, Univ. Grenoble Alpes, Minatec Campus, Grenoble

38054, France^2

关键词: Attenuation factors;    Charge mobilities;    High-k/metal gates;    Low field mobility;    Scattering mechanisms;    Series resistances;    Temperature dependence;    Temperature range;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/834/1/012001/pdf
DOI  :  10.1088/1742-6596/834/1/012001

来源: IOP

【 摘 要 】

We performed low temperature characterization of hole mobility in SiGe Trigate nanowires (NW) with gate length scaled down to 10nm. Trigate NWs with high-k/metal gate stack were fabricated on SOI wafers using solely optical lithography to design the wires with width down to 15nm. Drain current measurements are conducted within a cryogenic probe station enabling study on a 80K-350K temperature range. From these measurements we extracted the temperature dependence of the low field mobility μ0for a wide range of gate lengths and NW widths using the Y-function method in order to cancel the influence of the mobility attenuation factor due to series resistances. The impact of the temperature over the mobility can be used to identify the dominant scattering mechanism in the channel. Overall, we observed that hole transport is predominantly limited by the extra scattering due to neutral defects in all devices with a gate length under 40 nm. Source/Drain implantations trace the origins of these defects. Consequently, these particular process steps should gain special care in the design of further node generation as they critically hinder charge mobility at that scale.