An Improved SoC Test Scheduling Method Based on Simulated Annealing Algorithm

2017 International Conference on Control Engineering and Artificial Intelligence

计算机科学

Zheng, Jingjing^1 ; Shen, Zhihang^1 ; Gao, Huaien^1 ; Chen, Bianna^1 ; Zheng, Weida^1 ; Xiong, Xiaoming^1,2

GuangDong University of Technology, China^1

Guangzhou National Integrated Circuited Design Industrialization Center for Modern Service Industry, China^2

关键词: Greedy algorithms;    Integer Linear Programming;    Optimization rates;    Optimum solution;    Reference circuits;    Simulated annealing algorithms;    Soc test scheduling;    State of the art;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/806/1/012011/pdf
DOI  :  10.1088/1742-6596/806/1/012011

学科分类：计算机科学（综合）

来源: IOP

【 摘 要 】

In this paper, we propose an improved SoC test scheduling method based on simulated annealing algorithm (SA). It is our first to disorganize IP core assignment for each TAM to produce a new solution for SA, allocate TAM width for each TAM using greedy algorithm and calculate corresponding testing time. And accepting the core assignment according to the principle of simulated annealing algorithm and finally attain the optimum solution. Simultaneously, we run the test scheduling experiment with the international reference circuits provided by International Test Conference 2002(ITC'02) and the result shows that our algorithm is superior to the conventional integer linear programming algorithm (ILP), simulated annealing algorithm (SA) and genetic algorithm(GA). When TAM width reaches to 48,56 and 64, the testing time based on our algorithm is lesser than the classic methods and the optimization rates are 30.74%, 3.32%, 16.13% respectively. Moreover, the testing time based on our algorithm is very close to that of improved genetic algorithm (IGA), which is state-of-the-art at present.