An Integrated Circuit Design of High Efficiency Parallel-SSHI Rectifier for Piezoelectric Energy Harvesting

16th International Conference on Micro and Nanotechnology for Power Generation and Energy Conversion Applications

物理学;能源学

Hsieh, Y.C.^1 ; Chen, J.J.^1 ; Chen, H.S.^2 ; Wu, W.J.^1

Department of Engineering Science and Ocean Engineering Science, National Taiwan University, Taipei, Taiwan^1

Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan^2

关键词: Design and implementations;    Full bridge rectifier;    High-efficiency;    Internal capacitance;    Output current;    Parallel synchronized switch harvesting on inductors;    Piezoelectric energy harvesting;    Post layout simulation;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/773/1/012029/pdf
DOI  :  10.1088/1742-6596/773/1/012029

来源: IOP

【 摘 要 】

This paper presents the design and implementation of a rectifier for piezoelectric energy harvesting based on the parallel-synchronized-switch harvesting-on-inductor (P-SSHI) technique, also known as bias flip circuit[1]. The circuit is implemented with 0.25 μm CMOS high voltage process with only 0.9648 mm2chip area. Post-layout simulation of the circuit shows the circuit extracts 336% more power compared with the full-bridge rectifier. The system's average control power loss is 26 μW while operating with a self-made MEMS piezoelectric transducer with output current 25 μA 120Hz and internal capacitance 6.45nF. The output power is 43.42 μW under optimal load of 1.5 MΩ.