21st International Conference on Computing in High Energy and Nuclear Physics | |
Performance benchmark of LHCb code on state-of-the-art x86 architectures | |
物理学;计算机科学 | |
Campora Perez, D.H.^1 ; Neufeld, N.^1 ; Schwemmer, R.^1 | |
CERN, Geneva | |
CH-1211-23, Switzerland^1 | |
关键词: Blade servers; Event Filters; High-level triggers; On state; Optimal number; Relative costs; Stand -alone; | |
Others : https://iopscience.iop.org/article/10.1088/1742-6596/664/9/092022/pdf DOI : 10.1088/1742-6596/664/9/092022 |
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学科分类:计算机科学(综合) | |
来源: IOP | |
【 摘 要 】
For Run 2 of the LHC, LHCb is replacing a significant part of its event filter farm with new compute nodes. For the evaluation of the best performing solution, we have developed a method to convert our high level trigger application into a stand-alone, bootable benchmark image. With additional instrumentation we turned it into a self-optimising benchmark which explores techniques such as late forking, NUMA balancing and optimal number of threads, i.e. it automatically optimises box-level performance. We have run this procedure on a wide range of Haswell-E CPUs and numerous other architectures from both Intel and AMD, including also the latest Intel micro-blade servers. We present results in terms of performance, power consumption, overheads and relative cost.
【 预 览 】
Files | Size | Format | View |
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Performance benchmark of LHCb code on state-of-the-art x86 architectures | 1364KB | download |