A multi-port 10GbE PCIe NIC featuring UDP offload and GPUDirect capabilities.

21st International Conference on Computing in High Energy and Nuclear Physics

物理学;计算机科学

Ammendola, Roberto^1 ; Biagioni, Andrea^2 ; Frezza, Ottorino^2 ; Lamanna, Gianluca^3 ; Cicero, Francesca Lo^2 ; Lonardo, Alessandro^2 ; Martinelli, Michele^2 ; Paolucci, Pier Stanislao^2 ; Pastorelli, Elena^2 ; Pontisso, Luca^4 ; Rossetti, Davide^5 ; Simula, Francesco^2 ; Sozzi, Marco^4,6 ; Tosoratto, Laura^2 ; Vicini, Piero^2

INFN, Sezione di Roma Tor Vergata, Italy^1

INFN, Sezione di Roma, Italy^2

INFN, Laboratori Nazionali di Frascati, Italy^3

INFN, Sezione di Pisa, Italy^4

NVIDIA Corp, Santa Clara

CA, United States^5

Universita, Pisa, Italy^6

关键词: Computational optimization;    Low-latency communication;    Multi-stream;    Network interface cards;    Nvidia teslas;    Process inputs;    Real-time operation;    Transport layer protocols;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/664/9/092002/pdf
DOI  :  10.1088/1742-6596/664/9/092002

学科分类：计算机科学（综合）

来源: IOP

【 摘 要 】

NaNet-10 is a four-ports 10GbE PCIe Network Interface Card designed for low-latency real-time operations with GPU systems. To this purpose the design includes an UDP offload module, for fast and clock-cycle deterministic handling of the transport layer protocol, plus a GPUDirect P2P/RDMA engine for low-latency communication with NVIDIA Tesla GPU devices. A dedicated module (Multi-Stream) can optionally process input UDP streams before data is delivered through PCIe DMA to their destination devices, re-organizing data from different streams guaranteeing computational optimization. NaNet-10 is going to be integrated in the NA62 CERN experiment in order to assess the suitability of GPGPU systems as real-time triggers; results and lessons learned while performing this activity will be reported herein.