PGAS in-memory data processing for the Processing Unit of the Upgraded Electronics of the Tile Calorimeter of the ATLAS Detector

High Energy Particle Physics Workshop 2015

Ohene-Kwofie, Daniel^1 ; Otoo, Ekow^1

School of Electrical and Information Engineering, University of the Witwatersrand, Johannesburg, South Africa^1

关键词: Computational speed;    High performance computing;    Large Hadron collider LHC;    Partitioned Global Address Space;    Processing units;    Proton proton collisions;    System architectures;    Tile calorimeters;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/645/1/012022/pdf
DOI  :  10.1088/1742-6596/645/1/012022

来源: IOP

【 摘 要 】

The ATLAS detector, operated at the Large Hadron Collider (LHC) records proton-proton collisions at CERN every 50ns resulting in a sustained data flow up to PB/s. The upgraded Tile Calorimeter of the ATLAS experiment will sustain about 5PB/s of digital throughput. These massive data rates require extremely fast data capture and processing. Although there has been a steady increase in the processing speed of CPU/GPGPU assembled for high performance computing, the rate of data input and output, even under parallel I/O, has not kept up with the general increase in computing speeds. The problem then is whether one can implement an I/O subsystem infrastructure capable of meeting the computational speeds of the advanced computing systems at the petascale and exascale level. We propose a system architecture that leverages the Partitioned Global Address Space (PGAS) model of computing to maintain an in-memory data-store for the Processing Unit (PU) of the upgraded electronics of the Tile Calorimeter which is proposed to be used as a high throughput general purpose co-processor to the sROD of the upgraded Tile Calorimeter. The physical memory of the PUs are aggregated into a large global logical address space using RDMA- capable interconnects such as PCI- Express to enhance data processing throughput.