CSPAD upgrades and CSPAD V1.5 at LCLS

17th Pan-American Synchrotron Radiation Instrumentation Conference

Herrmann, S.^1 ; Hart, P.^1 ; Dragone, A.^1 ; Freytag, D.^1 ; Herbst, R.^1 ; Pines, J.^1 ; Weaver, M.^1 ; Carini, G.A.^1 ; Thayer, J.B.^1 ; Shawn, O.^1 ; Kenney, C.J.^1 ; Haller, G.^1

SLAC National Accelerator Laboratory, 2575 Sand Hill Rd, Menlo Park, CA 94025, United States^1

关键词: On chips;    One camera;    Pixel arrays;    Power cycling;    Power distributions;   

Others  :  https://iopscience.iop.org/article/10.1088/1742-6596/493/1/012013/pdf
DOI  :  10.1088/1742-6596/493/1/012013

来源: IOP

【 摘 要 】

After improving the PCB level electronics the next step in our continuing upgrade program of LCLS Cornell-SLAC Pixel Array Detector (CSPAD) cameras is the use of a new improved ASIC named CSPAD V1.5. The upgraded ASIC includes on chip DACs to set the bias currents of all amplifiers. The new chip also supports power cycling by design. Together this simplifies the PCB level complexity and eases the integration of many ASICs into one camera. Homogeneity across the full reticle size chip was improved by redesigning the power distribution. The upgrade included modifications of the gain latches and the per pixel comparators. Results from the upgraded cameras used at LCLS will be presented and discussed.