Dynamically Reconfigurable Architectures | |
Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators | |
计算机科学;物理学;数学 | |
Jens Huthmann ; Peter Muller ; Florian Stock ; Dietmar Hildenbrand ; Andreas Koch | |
Others : http://drops.dagstuhl.de/opus/volltexte/2010/2838/pdf/10281.KochAndreas.Paper.2838.pdf PID : 44966 |
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学科分类:计算机科学(综合) | |
来源: CEUR | |
【 摘 要 】
Geometric Algebra (GA), a generalization of quaternions and complex numbers, is a very powerful framework for intuitively expressing and manipulating the complex geometric relationships common to engineering problems. However, actual processing of GA expressions is very compute intensive, and acceleration is generally required for practical use. GPUs and FPGAs offer such acceleration, while requiring only low-power per operation. In this paper, we present key components of a proof-of-concept compilefiow combining symbolic and hardware optimization techniques to automatically generate hardware accelerators from the abstract GA descriptions that are suitable for high-performance embedded computing.
【 预 览 】
Files | Size | Format | View |
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Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators | 421KB | download |