The Dagstuhl seminar 08371 on FaultTolerant Distributed Algorithms on VLSI Chips was devoted to exploring whether the wealth of existing faulttolerant dis tributed algorithms research can be utilized for meeting the challenges of future generation VLSI chips. Participants from both the distributed faulttolerant al gorithms community, interested in this emerging application domain, and from the VLSI systemsonchip and digital design community, interested in wellfounded systemlevel approaches to faulttolerance, surveyed the current stateoftheart and tried to identify possibilities to work together. The seminar clearly achieved its pur pose: It became apparent that most existing research in Distributed Algorithms is too heavyweight for being immediately applied in the “core” VLSI design context, where power, area etc. are scarce resources. At the same time, however, it was recognized that emerging trends like large multicore chips and increasingly criti cal applications create new and promising application domains for faulttolerant distributed algorithms. We are convinced that the very fruitful crosscommunity interactions that took place during the Dagstuhl seminar will contribute to new research activities in those areas. General Topics: Data structures/algorithms/complexity, hardware, networks.
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FaultTolerant Distributed Algorithms on VLSI Chips